AMBA CXS Synthesizable Transactor provides a smart way to verify the ARM AMBA CXS component of a SOC or a ASIC in Emulator or FPGA platform. The SmartDV's AMBA CXS Synthesizable Transactor is fully compliant with standard AMBA CXS Specification.
- Features
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- Compliant with the latest ARM AMBA CXS specification.
- Supports CXS Transmitter and Receiver.
- Supports credit exchange mechanism.
- Supports Link activation and deactivation.
- Support for skipping link activation.
- Configurable credit mechanism including dynamic and pre-allocated credit control.
- Support for Interface properties and possible options as per protocol.
- Supports continuous delivery of data - uninterrupted transmission of packets.
- Fine grain control of below:
- Flit packets placement
- Packet control fields
- Ability to configure the width of all signals.
- Support for error injection during Link activation and deactivation.
- Ability to inject and detect errors including:
- Credit exchange mechanism
- Flit packets placement
- Parity
- Packet control fields
- Packet size
- Link activation and deactivation
- Programmable Protocol signal delays.
- Supports constrained randomization of protocol attributes.
- Programmable Timeout insertion.
- Rich set of configuration parameters to control CXS functionality.
- On-the-fly protocol and data checking.
- Notifies the testbench of significant events such as transactions, warnings, timing and protocol violations.
- Transaction logging and Performance Reporting support.
- Callbacks in Transmitter and Receiver for various events.
- Status counters for various events on bus.
- Benefits
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- Compatible with testbench writing using SmartDV VIP's
- All UVM sequences/testcases written with VIP can be reused
- Runs in every major emulators environment
- Runs in custom FPGA platforms
- AMBA CXS Synthesizable Transactor Env
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SmartDV's AMBA CXS Synthesizable env contains following.
- Synthesizable transactors
- Complete regression suite containing all the AMBA CXS Synthesizable testcases.
- Examples showing how to connect various components, and usage of Synthesizable Transactor.
- Detailed documentation of all class, task and functions used in verification env.
- Documentation contains User's Guide and Release notes.
