QSPI (Quad Serial Peripheral Interface) VIP can be used to verify Master or Slave device following the QSPI basic protocol.It can work with Verilog HDL environment and works with all Verilog simulators that are support SystemVerilog.
QSPI (Quad Serial Peripheral Interface) Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env
QSPI (Quad Serial Peripheral Interface) Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.
- Features
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- Supports Master and Slave Mode
- Supports the following modes in Serial Peripheral Interface
- Supports Single I/O,Dual I/O and Quad I/O,Extended I/O protocol
- Supports software and hardware reset
- Supports software and hardware write protection
- Supports sector and block erase
- Supports XIP mode
- Supports continous read with 8/16/32/64 byte wrap
- Supports OTP protection
- Supports DTR (Double Transfer Rate) Mode
- Supports Configurable dummy cycle number for fast read operation
- Supports Quad Peripheral Interface (QPI)
- Supports Quad Input/Output page program(4PP)
- Supports Advanced Security Features
- Block lock protection
- Advanced sector protection function (Solid and Password Protect)
- Supports Serial Flash Discoverable Parameters (SFDP) mode
- Built in functional coverage analysis.
- Supports Callbacks in master, slave and monitor for modifying, and sampling data/cmd on QSPI bus.
- Supports the Macronix , Windbond, Micron QSPI devices like W25Q128FW,W25Q128FVSIQ,W25Q128JVDTR,W25Q128JVSIQ,MT25QL128ABA,MX25L12872F,MX25L12873G,MX25l51245G,PCT26WF032,SST26VF016,SST26VF032
- Notifies the test bench of significant events such as transactions, warnings, and protocol violations. This can be written to separate log files.
- QSPI Verification IP comes with complete test suite to test every feature of QSPI specification.
- Benefits
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- Faster testbench development and more complete verification of QSPI designs.
- Easy to use command interface simplifies testbench control and configuration of slave and master.
- Simplifies results analysis.
- Runs in every major simulation environment.
- QSPI Verification Env
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SmartDV's QSPI Verification env contains following.
- Complete regression suite containing all the QSPI testcases.
- Examples showing how to connect various components, and usage of Master, Slave and Monitor.
- Detailed documentation of all class, task and function's used in verification env.
- Documentation contains User's Guide and Release notes.
